PIC16F871-E/L【PDF 97/143 页】IC MCU CMOS 20MHZ 2K FLSH 44PLCC

收藏本站

您好，
买卖IC网欢迎您。
请登录
免费注册

买卖IC网

Sheet目录3887

93页 94页 95页 96页 [97页]98页 99页 100页 101页

2003 Microchip Technology Inc.

DS30569B-page 55

PIC16F870/871

8.0

CAPTURE/COMPARE/PWM

MODULES

Each Capture/Compare/PWM (CCP) module contains

a 16-bit register which can operate as a:

16-bit Capture register

16-bit Compare register

PWM Master/Slave Duty Cycle register

Table 8-1 shows the resources and interactions of the

CCP module. In the following sections, the operation of

a CCP module is described.

8.1

CCP1 Module

Capture/Compare/PWM Register1 (CCPR1) is com-

prised of two 8-bit registers: CCPR1L (low byte) and

CCPR1H (high byte). The CCP1CON register controls

the operation of CCP1. The special event trigger is

generated by a compare match and will reset Timer1

and start an A/D conversion (if the A/D module is

enabled).

Additional information on CCP modules is available in

the PICmicro Mid-Range MCU Family Reference

Manual (DS33023) and in application note AN594,

“Using the CCP Modules” (DS00594).

TABLE 8-1:

CCP MODE - TIMER

RESOURCES REQUIRED

REGISTER 8-1:

CCP1CON REGISTER REGISTER (ADDRESS: 17h/1Dh)

CCP Mode

Timer Resource

Capture

Compare

PWM

Timer1

Timer2

U-0

R/W-0

—

CCP1X

CCP1Y

CCP1M3

CCP1M2 CCP1M1

CCP1M0

bit 7

bit 0

bit 7-6

Unimplemented: Read as '0'

bit 5-4

CCP1X:CCP1Y: PWM Least Significant bits

Capture mode:

Unused

Compare mode:

Unused

PWM mode:

These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.

bit 3-0

CCP1M3:CCP1M0: CCP1 Mode Select bits

0000

= Capture/Compare/PWM disabled (resets CCP1 module)

0100

= Capture mode, every falling edge

0101

= Capture mode, every rising edge

0110

= Capture mode, every 4th rising edge

0111

= Capture mode, every 16th rising edge

1000

= Compare mode, set output on match (CCP1IF bit is set)

1001

= Compare mode, clear output on match (CCP1IF bit is set)

1010

= Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin is

unaffected)

1011

= Compare mode, trigger special event (CCP1IF bit is set, CCP1 pin is unaffected);

CCP1resets TMR1, and starts an A/D conversion (if A/D module is enabled)

11xx

= PWM mode

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

采购需求

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

我的联系方式